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Tentative Technical Program

16th January 2006

17:00 -19:00       PRE-FUNCTION REGISTRATION  
19:00 onwards    COCKTAIL RECEPTION, REGENT HOTEL

17th January 2006

08:00-09:00   REGISTRATION  
09:00-09:45   OPENING SESSION
09:45-10:20   KEYNOTE 1
10:20-10:50   BREAK
10:50-12:05   SESSION 1
10:50-12:05   Session 1A: Special Session on Diagnostic in Deep  Submicron Technologies
                    Chair: C. LANDRAULT – LIRMM - France

• Some Common Aspects of Design Validation, Debug, and Diagnosis
  Hans-Joachim WUNDERLICH (Universität Stuttgart - Germany), Talal ARNAOUT, Gunter BARTSCH,

• Yield Improvement and Monitoring Using Electrical Fault Diagnosis in a Wafer Foundry
  Lim SOON, Camelia HORA (Philips Research – The Netherlands), Hua Eng LOW, Bryan LIM, Beng Ghee TAN, Dong Ju SON (Systems on Silicon Manufacturing Company - Singapore)

• Diagnosis in the Presence of Test Compression Using X-Compact
  Srikanth VENKATARAMAN, Subhasish MITRA, Nadir BASTURKMEN (Intel Corporation - USA)

10:50-12:05   Session 1B: Analog Components and Design Techniques
                    Chair: H. KERKHOFF – University of Twente - The Netherlands

• Using Dither to Improve the Performance of Lossy Sigma-Delta Modulators
  Marcel JACOMET, Josef GOETTE, Markus HAGER (Berne University of Applied Sciences - Switzerland)

• CMOS Schottky Diode Microwave Power Detector Fabrication, Spice Modeling, and Applications
  WOOCHUL JEON, John MELNGAILIS, Robert NEWCOMB (University of Maryland - USA)

• Design and Implementation of Analog Multitone Signal Generator Using Regenerative Frequency Divider for OFDM Transceiver
  Amlan GHOSH, Abhishek RANJAN, Nirmal B.CHAKRABARTI (University of Utah - USA)

12:05-13:20   LUNCH
13:20-15:00   SESSION 2
13:20-15:00   Session 2A: Image and Video Processing
                     Chair: R. AKMELIAWATI – Monash University - Malaysia

• Image Noise Removal in Nakagami Fading Channels via Bayesian Estimator
  Xu HUANG, A.C.MADOC, Dharmendra SHARMA (University of Canberra - Australia)

• A Hybrid Scheme for Temporal Video Segmentation
  Hui FANG, Jianmin JIANG (University of Bradford - U.K.), Yong YIN (Chongqing University ), P.NORHASHIMAH

• Hardware Implementation for Face Detection on Xilinx Virtex-II FPGA Using the Reversible Component Transformation Colour Space
  Melanie Po-Leen OOI (Monash University Malaysia - Malaysia)

• Using Design Patterns to Overcome Image Processing Constraints on FPGAs
  Kim GRIBBON, Donald BAILEY, Christopher Troy JOHNSTON (Massey University - New Zealand)

13:20-15:00   Session 2B: Special Session on Industrial and Practical Test Engineering
                    Chair: Z. ABU KASSIM – Freescale Semiconductors - Malaysia

• A Low Cost, High Quality Embedded Array DFT Technique for High Performance Processors Zhuoyu BAO, Suriya KUMAR, David WU, Vimal NATARAJAN, Mike LIN (Intel Corporation - USA)

• VertiCal, a Universal Calibration System for eSys High Performance 32-Bit PowerPC Microcontrollers; Test Challenges & Solution
  Joon Huang CHUAH, Joel KNIGHT (Freescale Semiconductor Malaysia Sdn Bhd - Malaysia)

• Enabling Test-Time Optimized Pseudorandom Bit Stream (PRBS) 2^31 BER Testing on Automated Test Equipment for 10Gbps Device
  Shao Chee ONG (Intel Technology Sdn Bhd - Malaysia)

• Test Cost Saving and Challenges in the Implementation of x6 and x8 parallel testing on Freescale 16-bit HCS12 Micro-controller product family.
  Boon Kian LEW (Freescale Semiconductor Malaysia Sdn. Bhd. - Malaysia)

15:00-15:40   BREAK & POSTERS
15:00-15:40   Poster Session 1
                    Chair: T. WIN – Monash University - Malaysia

• Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-based Approach
  Kan-Lin HSIUNG (Stanford University - USA)

• Dual-Head Marking Performance Optimisation via Evolutionary Solutions
  Johnny KOH Siaw Paw, TIONG Sieh Kiong (University Tenaga Nasional - Malaysia), Ishak ARIS, Senan MAHMOUD (Universiti Putra Malaysia - Malaysia)

• Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmable Gate Array
  Peter GREEN, Desmond TAYLOR (University of Canterbury – New Zealand)

• Curvature Compensated CMOS Bandgap with Sub 1V Supply
  Kevin TOM (Victoria University - Australia), Atila ALVANDPOUR (Linkoping University - Sweden)

• Energy Efficient Cache Tuning with Performance Bound
  Leipo YAN, Siew Kei LAM, Srikanthan THAMBIPILLAI, Jigang WU (Nanyang Technological University - Singapore)

• Developing an Effective Microcontroller Course Based on Field-Programmable Mixed Signal Micro-controller Product
  Gourab SENGUPTA (Massey University - New Zealand), Tracey LEE Kah Mein (Singapore Poly),CHEW Moi-Tin (Monash University - Malaysia), Subhas MUKHOPADHYAY (Massey University - New Zealand)

• Test Pattern Optimization using Proper Seed Selection in Mixed-Mode Technique
  Syed Zahidul ISLAM , Mohd. Alauddin Mohd. ALI(Universiti Kebangsaan Malaysia - Malaysia)

15:40-17:20   SESSION 3
15:40-17:20   Session 3A: Special Session on Electronics Education
                    Chair: T. MOUTHAAN – University of Twente - The Netherlands

• Internationalisation of Masters Education: Globalisation at Work
  Antoni J MOUTHAAN (University of Twente – The Netherlands), Anke KOHL

• Industry-Academia Collaboration in Undergraduate Test Engineering Unit Development
  Serge DEMIDENKO (Monash University - Malaysia), Zainal ABU-KASSIM, Victor LAI (Freescale Semiconductor - Malaysia)

• A Project Based Approach to Teach Mixed-Signal Embedded Microcontroller for DC Motor Control
  Gourab SENGUPTA, Subhas MUKHOPADHYAY (Massey University - New Zealand), CHEW Moi-Tin (Monash University - Malaysia)

• ELECTRONIC TEST TECHNOLOGY CURRICULUM REVISITING
  Serge DEMIDENKO (Monash University - Malaysia), Wayne MOORHEAD (Agilent Technologies - Singapore)

15:40-17:20   Session 3B: Synthesis and Logic Optimization
                    Chair: B. ROUZEYRE – LIRMM - France

• Efficient Search Methods for Obtaining Exact Minimum AND-EXOR Expressions
  Takashi HIRAYAMA, Yasuaki NISHITANI (Iwate University - Japan)

• A new Design Partitioning Approach for Low Power High-Level Synthesis
  Achim RETTBERG, Franz J. RAMMIG (Universität Paderborn - Germany)

• Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays
  Jia DI, Parag LALA, D. VASUDEVAN (University of Arkansas, Fayetteville - USA)

> Click for 18th January program
> Click for 19th January program