Dr. Patrick W. C. Ho

Lecturer
School of Engineering

patrick.ho@monash.edu
+603 5514 6238
Room 2-4-39
ORCID

Personal statement

Dr. Patrick W. C. Ho completed his Bachelor of Engineering with first class honours in 2009, and he created an Intelligent traffic light system for his final year project. He graduated from Masters in Science in 2012, by developing a prototype for a voice-automated elevator system. He completed his PhD in Electronics Engineering in 2016 from the University of Nottingham Malaysia Campus, and his dissertation was entitled “Non-volatile FPGA architecture using resistive switching devices”.

He was offered a job with Intel Microelectronics as a Graduate Trainee before he even graduated from his degree. He then worked for Altera Corporation as a Design Engineer before pursuing his Masters. While doing his PhD, he gained teaching experience with Methodist College Kuala Lumpur (MCKL) teaching A-levels Physics. Towards completing his PhD, he was hired as a sessional staff by Monash University.

In 2017, he signed for Monash University as a Scholarly Teaching Fellow in the department of Electrical & Computer Systems Engineering (ECSE). He currently the unit coordinator for: ECE2131 Electrical Circuits, ECE4063 Large Scale Digital Design, PHS1002 Physics for Engineering, and ECE2072 Digital Systems. He has also previously assisted in ENG1002 Engineering design: Cleaner, safer, smarter, and ECE2071 - Computer organisation and programming. Apart from teaching responsibilities, he is also the industrial training advisor for ECSE, and was formerly the ECSE Industry Advisory Panel (IAP) representative.

Academic degrees

  • Doctor of Philosophy in Electronics Engineering, University of Nottingham Malaysia Campus (UNMC), 2016
  • Master in Electronics, Communication and Computer Engineering, University of Nottingham Malaysia Campus (UNMC), 2012
  • Degree in Electrical & Electronics Engineering (Hons), Universiti Tunku Abdul Rahman (UTAR), 2009

Professional affiliations

Member of National Professional Bodies

  • Board of Engineers Malaysia, Member

Member of International Professional Bodies

  • IEEE, Member

Research Interests

Dr. Patrick Ho’s research area involved modelling and simulation of non-volatile memories, especially memristors, in various FPGA and VLSI-related applications with various simulation models and parameters.

His current research in memristors have recently produced a Q1 journal article in the Journal of Semiconductor Science and Technology, entitled "Multilevel memristive non-volatile look-up table using two transmission gates one memristor memory cells".

He is also currently in collaboration with CAD-IT and is partially assisting them in research in the areas of image-processing, object dectection and recognition, and articial intelligence. CAD-IT have recently co-sponsored three students for their Final Year Projects (FYP).

Research Projects

Title: Configurable memristive logic block for memristive-based FPGA architectures

This article proposes a Configurable Memristive Logic Block (CMLB) that comprises of novel memristive logic cells. The memristive logic cells are constructed from memristive D flip-flop, 6-bit non-volatile look-up table (NVLUT), and multiplexers. The memristive logic cells are interconnected using memristive switch matrix cells to form the CMLB. The CMLB is then used to construct a memristor-based FPGA architecture. The proposed CMLB shows a reduction of 8.6% of device area and 1.094 times lesser critical path delay against the SRAM-based FPGA architecture. Against similar CMOS-based circuits, the memristive D flip-flop provides switching speed of 1.08 times faster, the NVLUT reduces power consumption by 6.25 nW, and the memristive logic cells reduce device area by 60.416 µm2. In this research work also, various memristor-based FPGA architectures found in the literature are compared against the SRAM-based FPGA architecture.

Education

Units taught

PHS1002 - Physics for Engineering

ENG1002 - Engineering Design: Cleaner, Safer, Smarter

ECE2131 - Electrical Circuits

ECE4063 - Large Scale Digital Design

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Local grants

  • Reliable Communication Architecture for Navigation and Guidance of Interconnected Aerial Vehicles, Ir. Dr. Joanne Lim Mun Yee, Dr. Patrick Ho Wan Chuan, Dr. Chong Chun Yoong, 2018-2021, Collaborative Research in Engineering, Science and Technology (CREST) Grant Scheme, RM401,625.50
  • A Big Data Analytics Approach for Identifying Reuse-Proneness of Object-Oriented Classes in Source Code Management Systems, Dr. Chong Chun Yoong, Dr. Patrick Ho Wan Chuan, Ir. Dr. Joanne Lim Mun Yee, 2018-2020, Ministry of Higher Education, Fundamental Research Grant Scheme (FRGS)

Current supervision

Chin Ming Jun (PhD candidate)

Reliable Communication Architecture for Navigation and Guidance of Interconnected Aerial Vehicles

Dec 2018 - Current

Monash University Malaysia

Ho Mun Chon (PhD candidate)

Reliable Communication Architecture for Navigation and Guidance of Interconnected Aerial Vehicles

Dec 2018 - Current

Monash University Malaysia

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