Optimisation of place & route memristor circuits using novel fitting algorithms

Written by Dr Patrick Ho, School of Engineering

Memristor evolves the current 50-year-old semiconductor process technology. It provides an opportunity to create memory elements that can hold information longer than ten years, shrinking component sizes to 6 times smaller, and consumes much less power than the current technology. In this research project, we create new memristor circuits directly from programming large scale designs.

In the semiconductor process today, there are open-source algorithms that convert HDL into netlists compatible with CMOS circuits. However, there are no algorithms available that can convert HDL into memristor circuits. Moreover, several types of memristor structures and circuits can be utilised in different combinations, which are not available in current circuit netlist generators.

Our research will evolve the semiconductor process technology which is on its way to mass-producing memristor circuits in future electrical & electronics applications. Previously found concepts and simulation models are used to build an entirely new memristor-circuit netlist generator algorithm. Much of the groundwork has been conducted and amid publishing journal articles. The research project is expected to be completed within three years.

Our research has attracted semiconductor companies since we are working on an evolutionary semiconductor process technology. Meanwhile, Monash University Malaysia has been supporting us in terms of contacting industry partners and seed funding to kick-start the research project.